From 744b0f3be1d1f10224a4f5965ce065973a6edf3c Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Fri, 18 Sep 2009 08:29:46 +0100 Subject: [PATCH] AMD IOMMU: Extend the loop counter for polling completion wait bit. Signed-off-by: Wei Wang --- xen/drivers/passthrough/amd/iommu_map.c | 42 ++++++++------------ xen/include/asm-x86/hvm/svm/amd-iommu-defs.h | 3 -- 2 files changed, 16 insertions(+), 29 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c index 7cb79ab436..3d4e41548d 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -23,8 +23,6 @@ #include #include -long amd_iommu_poll_comp_wait = COMPLETION_WAIT_DEFAULT_POLLING_COUNT; - static int queue_iommu_command(struct amd_iommu *iommu, u32 cmd[]) { u32 tail, head, *cmd_buffer; @@ -131,32 +129,24 @@ void flush_command_buffer(struct amd_iommu *iommu) IOMMU_COMP_WAIT_I_FLAG_SHIFT, &cmd[0]); send_iommu_command(iommu, cmd); - /* wait for 'ComWaitInt' to signal comp#endifletion? */ - if ( amd_iommu_poll_comp_wait ) + /* Make loop_count long enough for polling completion wait bit */ + loop_count = 1000; + do { + status = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET); + comp_wait = get_field_from_reg_u32(status, + IOMMU_STATUS_COMP_WAIT_INT_MASK, + IOMMU_STATUS_COMP_WAIT_INT_SHIFT); + --loop_count; + } while ( !comp_wait && loop_count ); + + if ( comp_wait ) { - loop_count = amd_iommu_poll_comp_wait; - do { - status = readl(iommu->mmio_base + - IOMMU_STATUS_MMIO_OFFSET); - comp_wait = get_field_from_reg_u32( - status, - IOMMU_STATUS_COMP_WAIT_INT_MASK, - IOMMU_STATUS_COMP_WAIT_INT_SHIFT); - --loop_count; - } while ( loop_count && !comp_wait ); - - if ( comp_wait ) - { - /* clear 'ComWaitInt' in status register (WIC) */ - status &= IOMMU_STATUS_COMP_WAIT_INT_MASK; - writel(status, iommu->mmio_base + - IOMMU_STATUS_MMIO_OFFSET); - } - else - { - AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n"); - } + /* clear 'ComWaitInt' in status register (WIC) */ + status &= IOMMU_STATUS_COMP_WAIT_INT_MASK; + writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET); + return; } + AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n"); } static void clear_iommu_l1e_present(u64 l2e, unsigned long gfn) diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h index caffc1050e..463121bf77 100644 --- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h @@ -21,9 +21,6 @@ #ifndef _ASM_X86_64_AMD_IOMMU_DEFS_H #define _ASM_X86_64_AMD_IOMMU_DEFS_H -/* IOMMU ComWaitInt polling after issuing a COMPLETION_WAIT command */ -#define COMPLETION_WAIT_DEFAULT_POLLING_COUNT 10 - /* IOMMU Command Buffer entries: in power of 2 increments, minimum of 256 */ #define IOMMU_CMD_BUFFER_DEFAULT_ENTRIES 512 -- 2.30.2